Complex Instruction Set Computer (CISC)
A Complex Instruction Set Computer is a CPU architecture with a large, varied instruction set where individual instructions can take many cycles. x86 is the canonical example.
Why did CISC exist?
It was intended to make hand-written assembly easier: a single
sineinstruction beats grinding out the calculation yourself. Nice for the programmer, hard to implement and hard to pipeline.
Characteristics:
- Varied CPI, roughly 4 to 10 cycles per instruction
- Predictable cycle count once known, so early-era performance modelling was basically
page_faults * disk_time + instructions * CPI - Hard to pipeline deeply because of instruction complexity and variable latency
CISC vs RISC
RISC flipped the tradeoff: few simple instructions, mostly 1 cycle each, easier to pipeline, harder to hand-code. The compiler picks up the slack (e.g. filling delay slots). Modern x86 is really CISC on the surface, RISC-like micro-ops under the hood.