CPU Performance Walls
The CPU performance walls are the four hardware barriers that collectively ended the era of “next year’s chip runs your code faster for free.”
These walls motivate basically every modern CPU trick:
Why?
Before ~2005, CPUs got faster every generation — higher clock, same program, more speed. Then the power wall hit and clock scaling died. You’d think you could just go around it, but then we also hit three other walls too, and now we are surrounded.
| # | Wall | What it is | How we respond |
|---|---|---|---|
| 1 | Power wall | Past ~3 GHz, higher clock needs more voltage → more heat → thermal failure. Hit around 2005. | Stop cranking the clock; go multicore and wider instead |
| 2 | ILP wall | Branch prediction already ~95% accurate; diminishing returns on further ILP | Bigger reorder buffers, more functional units, OoO — small gains |
| 3 | Memory wall | DRAM latency grew ~3× slower than CPU speed → cache misses dominate runtime | Multi-level cache, miss shadow, prefetch, overlap misses via OoO |
| 4 | Speed of light | Signal propagation across the die; fundamental physics | Shorten wires, stack dies, accept it |
Practical implication: when someone asks “why doesn’t my code just get faster every year anymore?”, the bottleneck is one of these, usually the memory wall.