DRAM Bursting
DRAM Bursting is an inherent feature of DRAM, which enables contiguous memory addresses to be accessed and delivered simultaneously, thus resulting in much higher memory throughput.
When is DRAM Bursting enabled?
For DRAM to properly memory in a burst, these memory addresses must be contiguous.
Learned about this through the PMPP book.
https://en.wikipedia.org/wiki/Burst_mode_(computing)
Each time a DRAM location is accessed, a range of consecutive locations that include the requested location are accessed.
Why is understanding this concept important?
If an application makes focused use of data from these bursts, the DRAMs can supply the data at a much higher rate than would be the case if a truly random sequence of locations were accessed.
In CUDA, Memory Coalescing is used to facilitate this.